#include <asm.h>
#include <regdef.h>
#include <new_inst_test.h>

LEAF(my31_ll_sc_test)
    .set noreorder
    addiu s0,s0,1
    li    t0,0x800d0000
    li    s2,0xa # fake trap
    sw    s2,0(t0)
##clear cause.TI, status,EXL
    mtc0  zero,c0_compare;
    lui   s7,0x0040
    mtc0  s7,c0_status
    nop
    lui   s7,0x0009

### inst test
    # init
    li t0,0x800d1000
    li t1,0x1314
    sw t1,0(t0)
    li t9,0x1

start:
    addiu t9,t9,0xffff
    # read
    ll t2,0(t0)
    bne t2,t1,inst_error
    nop
    addiu t2,t2,0x1;
    tge t9,zero

    beq t9,zero,trap_happen
    nop
    j trap_not_happen
    nop
trap_happen:
    sc t2,0(t0)
    # detect if t2 is zero
    bne t2,zero,inst_error
    nop
    lw t2,0(t0)
    bne t2,t1,inst_error
    nop
    j end
    nop
trap_not_happen:
    sc t2,0(t0)
    li t3,0x1
    bne t2,t3,inst_error
    nop
    lw t3,0(t0)
    li t4,0x1315
    bne t3,t4,inst_error
    nop
    j end
    nop
end:
    li t5,0xffffffff
    li t2,0x1111
    bne t9,t5,start;
    nop





###score ++
    addiu s3, s3, 1
###output (s0<<24)|s3
inst_error:
    sll t1, s0, 24
    or t0, t1, s3
    sw t0, 0(s1)
    jr ra
    nop
END(my31_ll_sc_test)
